Cryptographic processor for control of telecom processing payloads

STATUS | Ongoing
STATUS DATE | 24/09/2014
ACTIVITY CODE |

Objectives

  • To analyse the security needs of the data on telecommunications satellite payload commanding and monitoring links and to develop a system security concept covering these needs.
  • To specify the requirements for a generic (potentially reusable in multiple missions) cryptographic processor for implementing the devised security concept in the space segment
  • To design, manufacture and test a Breadboard Model of the on-board cryptographic processor to secure the ground-space channel used to control and reconfigure advanced telecommunication payloads.
  • To design and manufacture test equipment to support the verification and validation of the cryptographic processor performance and functionality.
  • To define the security assurance process used to aid in fulfilling the security requirements related to the development lifecycle and functionality of such a cryptographic processor.

Challenges

 n/a

Plan

The activities were divided into 6 Tasks:
  • Task 1: analysis of the security risks of generic telecom satellite configuration and monitoring links and devising of a corresponding security concept and on-board cryptographic processor (CP) requirements specification
  • Task 2: preliminary design of the CP including architecture, state machine and external interfaces
  • Task 3: detailed design and implementation of the CP and corresponding test equipment.
  • Task 4: manufacturing of CP breadboard model hardware and programming of FPGAs, plus manufacturing of the test equipment
  • Task 5: testing of the CP bread board model
  • Task 6: parallel task to define and implement a security assurance process based on a selected security standard (FIPS-140-3) for the CP

Current Status

The study has successfully devised a generically applicable security concept for telecom satellite payload configuration and control links and defined requirements for a cryptographic processor (CP) to implement the space segment of this concept. A breadboard model of the CP has been designed, implemented, manufactured and tested/demonstrated using dedicated test equipment also developed in this project. The CP is a highly modular generic and reusable hardware cryptographic unit, ready for manufacture (after possible mission-specific minor modifications), qualification and deployment for TM/TC security in future missions.