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Objectives
The ASCEND project develops a product family of On-Board Data Processing (OBDP) units that deliver edge cloud computing capabilities to satellite constellations. The Data Processing Units (DPUs) leverage commercial-off-the-shelf (COTS) GPU-accelerated computing technologies to enable onboard artificial intelligence in SmallSat and Microsatellite platforms.
The product family consists of two units:
• Sterna: a compact, stand-alone DPU for SWaP-constrained platforms (large CubeSats to Microsatellites), built around the NVIDIA Jetson Orin NX.
• Morus: a higher-performance successor for Minisatellites and Small Satellites, using a modular daughterboard architecture, targeting the NVIDIA Jetson AGX Orin and Jetson Thor platforms.
The DPUs position satellites as flexible space cloud servers by virtualising higher-level communication layers (L2/L3) onboard, enabling Software-Defined Payloads, cognitive payload functionalities through AI/ML, and the ability to repurpose satellites for secondary missions such as Earth observation.
Challenges
Key challenges include qualifying high-performance COTS computing modules for the space environment, particularly radiation tolerance and thermal management within conduction-cooled platforms. Virtualising 5G RAN components onboard introduces real-time processing constraints absent in terrestrial deployments. Integrating a RAN Intelligent Controller in a closed AI feedback loop for dynamic spectrum management requires low-latency inference alongside the communication stack. Achieving a primarily European supply chain (≥90% of BOM value) while maintaining performance competitiveness presents an additional strategic challenge.
System Architecture
Both Sterna and Morus follow a dual-domain architecture:
1. Supervisor Domain: A high-reliability foundation built on a radiation-tolerant microcontroller providing autonomous fault detection, isolation and recovery (FDIR), power sequencing with latch-up protection, health monitoring via housekeeping telemetry, and A/B partition recovery with golden image fallback.
2. Processing Domain: Built on NVIDIA Jetson System-on-Module technology, providing GPU-accelerated AI inference and general-purpose computing. Runs a Linux-based OS with container-based application deployment.
Sterna is a stand-alone carrier board (PCIe/104 form factor) hosting the Jetson Orin NX. Morus uses a motherboard-daughterboard architecture supporting the Jetson AGX Orin or Thor T5000, integrating into slottable backplane standards.
The software architecture aligns the DPUs with 5G gNodeB and MEC standards, enabling virtualisation of telecom functions. AI applications such as spectrum monitoring run within a near-RT RAN Intelligent Controller (RIC) to dynamically optimise resource allocation. Kubernetes orchestration enables multi-tenant workloads, extending the terrestrial MEC paradigm into orbit.
Plan
The project spans four development phases: Definition (completed), Technology (completed for Sterna), Product Phase for Sterna (in progress, targeting TRL 8 via Qualification Model manufacturing and environmental testing), and Extended Technology Phase for Morus (in progress, targeting TRL 6 via breadboard and Engineering Model development). Key milestones include PDR, CDR, TRR, and TRB for each track.
An In-Orbit Demonstration of Morus is planned for 2027. The current contract period runs from January 2026 to March 2028.
Current Status
The Definition Phase and initial Technology Phase for Sterna are completed. The Sterna Engineering Model has passed functional, thermal-vacuum, vibration, EMC, and radiation testing, achieving TRL 6.
A CCN was submitted in September 2025, expanding the project into a two-product family. Sterna enters the Product Phase for qualification (TRL 8), including 5G gNodeB and spectrum monitoring use case demonstrations. Morus enters an Extended Technology Phase from TRL 2 to TRL 6, with an in-orbit demonstration test plan under definition. Sterna is flying for the first time in an IOD mission in Q2 2026.
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