PAGE CONTENTS
Objectives
The objective of this project is to design a hardware (HW) demonstrator providing a reference design based on the DVB-S2X standard suitable for emerging markets. To this purpose, relevant fixed and mobile scenarios such as fixed VSAT, land mobile, maritime, and aeronautical services have been identified. Also, advanced physical layer (PHY) techniques have been investigated in order to deal with the peculiarities of the chosen scenarios and guarantee reliable communications even in very low signal-to-noise ratio (SNR) regime. The final design includes all the realistic satellite system impairments and the corresponding compensation algorithms, and is verified by means of software (SW) simulations and HW measurements.
Challenges
The first challenge was the identification of scenarios and applications that could be relevant for emerging markets. The selected scenarios came with peculiarities such as mobility, fading, and high noise level requiring a proper system design. The second challenge was therefore the identification of suitable techniques able to cope with the limits of the implementation and the conditions imposed by the scenarios. The combination of scenario-related and implementation -related constraints led the successive investigation of PHY techniques, especially concerning the design of a synchronization chain operating at very low SNRs.
System Architecture
The overall test system includes all the key functionalities required by the DVB-S2X standard. The receiver only knows whether the data is organized according to the normal S2 frame or the super-frame format #3. The investigated PHY techniques (i.e., the LUT-based signal predistortion and the convolutional channel interleaver) can be switched on or off. The test bed includes the EB-RACE SDR platform, a Propsim F8 Radio Channel emulator, and the IZT C3040 satellite link emulator. The system control is implemented by a MATLAB script that has access to the waveform registers and can control the Propsim and the satellite link emulator through an Ethernet connection. The testbed consists of Xilinx Virtex 6 family LX240T FPGAs for waveform development with a design wrapper. The BCH/LDPC-decoder is an IP-block from Fraunhofer IIS. The waveform generator supports ACM and VCM. When ACM is selected, it can adapt the waveform to the SNR variations by choosing the appropriate MODCOD according to the measured SNR. When using VCM, there can be two individual data streams with different MODCODs. FER and data rate are measured for testing.
Plan
The project has 2 phases: Phase 1 aims at defining new potential use cases and studying novel PHY techniques in the identified scenarios, while Phase 2 is focused on the implementation of a HW demonstrator. In Phase 1, the most promising algorithms are verified by means of SW simulations, and only the selected ones are integrated in HW during Phase 2. Finally, an extensive measurement campaign is carried out in a laboratory environment to verify the proposed techniques in the selected scenarios.
Current Status
The project has been completed and a demonstrator was produced, showing that DVB-S2X can be a common technology enabler for land-mobile, aeronautical, and maritime satellite scenarios, as well as for the fixed VSAT. The proposed design implements not only S2X features such as super-frame format #3 but also advanced PHY techniques namely; signal predistortion and convolutional channel interleaving. The testbed includes all the realistic satellite system impairments and can operate at very low SNRs, Doppler shift, and deep fading being typical for mobile scenarios. This makes the proposed system attractive for further development towards commercial equipment and GEO/MEO/LEO satellite applications.
