PAGE CONTENTS
Objectives
Due to customer demands of smaller products, shorter lead times, and eventually more flexible frequency allocations, this proposal targets the local oscillator for the next generation of the RUAG converter and receiver family. The local oscillator is called WSLO (Wideband Synthesized Local Oscillator).
The over-all objective is to reduce cost, mass, footprint and delivery time to customers by 20%. The goals in this project are: design an LO with lower recurring costs and a shorter lead time than the current Compact LO. To improve the recurring cost, the focus will be on reducing manual labor and overhead costs associated with MAIT. The lead time goal will be fulfilled by eliminating the need for custom cut crystal oscillators.
A study of phase noise impact is also included and made by Chalmers University I Gothenburg. Chalmers´ role in this project is to study phase noise profile impact to bit rate versus various encoding schemes, channel bandwidths and transmitter/receiver performances (including digital tracking schemes) and to verify the modeled results by replacing the modeled converter and LO with their physical counterparts.
Challenges
The most critical challenge in this project is the performance of the fractional-N synthesizer, NOVELOSAT which is developed by IMST. The development of the chip itself has been supported by several other ESA Projects. A space qualified radiation hardened synthesizer with performance acceptable to our customers is the key challenge of this project.
System Architecture
A block diagram of the Wideband Synthesized Local Oscillator, WSLO is given below:
Plan
Start of Project March 2017
System and Specification Review May 2017
PDR Jan 2018
The project was temporarily stopped due to RUAG internal reorganization.
TRR May 2019
TRB/Final Oct 2019
Current Status
An EM of the WSLO synthesizer has been designed manufactured and tested. The key component included is the NOVELOSAT chip version 1.5. Feedback on synthesizer performance has been given by RUAG to IMST, and during this project the chip has been updated due to this feedback. It is not fully clear if phase noise and spurious performance of the NOVELOSAT chip is competitive compared to other solutions in all cases. It remains to qualify the chip for Space use, this topic is in the hands of DLR and not part of this project.
Picture of test set-up, Synthesiser EM board to the right.
The Project is completed.
