Space-Lock go big with mini hold-down release actuator

Publication date

24 Jul 2023

The number of small satellite constellations has soared in recent times and the demand for smaller, lighter and cheaper antennas, solar arrays and associated technologies has grown with it. With an existing range of Hold-Down Release Actuators (HDRAs) already in their portfolio, Austria-based Space-Lock has successfully developed a mini HDRA, known as MiRA (Mini Release Actuator), supported by ESA ARTES Core Competitiveness Programme – Advanced Technology and the Austrian Space Agency.

Release actuators are used in Hold-Down and Release Mechanisms (HDRMs). These constitute an essential element of satellite deployment, keeping satellite equipment safely stowed during launch and optimised to ensure reliable release when in the desired orbiting position. With a growing need for HDRAs compatible with the emerging microsatellite market, Space-Lock set out to address this opportunity by developing a mini HDRA with high reliability, user reset-ability and small size. 

Space-Lock’s mini HDRA is roughly the size of a matchbox

Initial research carried out as part of the ESA-backed project showed a significant demand for the proposed mini HDRA and informed the project around technical requirements and future market demand. The project started with three different concepts which were all developed to breadboard (BB) stage where they underwent functional testing, vibration testing and thermal cycling. Whilst all BBs showed a good level of functional performance during testing, the shape memory alloy and burn wire concepts were further developed to Engineering Model (EM), where the burn wire performed particularly well and was selected as the winning concept. Based on a threaded-hole concept as the mechanical interface for the release bolt, the burn wire mini design met all initial targets, has an operating temperature range of -150° C/+150° C, and is roughly the size of a matchbox at just 54x36x16mm. 

Following the success of the ESA-backed project and with demand for the mini HDRA increasing, Space-Lock continued the development of the burn wire concept to qualify the product further. A rigorous and comprehensive qualifying campaign was carried out, using three qualifying models (QMs) including vibration, shock, thermal-vacuum cycling, thermal-vacuum life test and an ambient life test. Qualifying test levels were consistently high and, in total, the QMs made 209 successful consecutive releases.

Florian Guenther, CEO of Space-Lock, said “The successful development of this competitive product further increases our product portfolio and market success. We are very grateful for the excellent support provided by ESA and the Austrian Space Agency. The ARTES programme proved once more to enable efficient development of a highly competitive product.”

Paul Greenway, Technical Officer and Sandro Patti, Mechanisms Expert on the mini HDRA project, said “We are very pleased to have supported this successful ARTES activity which has enabled a new HDRA product to answer the needs of the small satellite industry”.

Space Lock’s low shock European Miniature Release Actuator MiRA 1kN is ECSS-compliant and offers a wholly European, affordable and reliable solution, increasing the competitiveness of the European and Canadian small satellite sector.

EOR environment and SADC tool

Electric Orbit Raising Radiation Environment and Solar Array Degradation

STATUS | Completed
STATUS DATE | 17/07/2023
ACTIVITY CODE | 4F.126

Objectives

The project objective is to provide a user friendly and fast way to predict solar cell degradation due to space exposure. In particular, the provided tool is validated against ground tests. The ground tests are designed specifically to assess core assumptions of the models used in the project. The end result is provided as both a standalone tool as well as integrated in the ESA Network of Models (nom.esa.int). An error of 2% is expected on the results.

EOR environment and SADC tool objectives

 

Challenges

The project produced a new environment model, OMEP, as well as a new calculation tool, SCAD, adapted to current and future missions. Ground testing needed to be tuned to target core assumptions of the current theories and methods regarding solar cell degradation.

System Architecture

The tool is a modular system and the various intermediate results can be retrieved if needed.

EOR environment and SADC tool system architecture

The architecture of the provided tool is shown in the picture above. This approach is compatible with the NoM platform where one can combine various models from different projects to create one’s own calculation scheme. The SADC can be built back from the individual modules (see figure) or can be tailored by the end user to suite any specific need. For example, the original environment model or degradation models can be swapped with any other compatible model featured in NoM as long as the inputs/outputs are compatible (see NoM taxonomy for more details).

Plan

The project is divided into several work packages as per the figure below.

EOR environment and SADC tool project plan

 
 

Current Status

COMPLETED!

Magnetic Brake

Actuator with High Resolution Magnetic Braking

STATUS | Completed
STATUS DATE | 10/07/2023
ACTIVITY CODE | 4E.072.

Objectives

EM_MagBrak_1

The objective of the activity is to design, develop, manufacture and test a high-resolution magnetic brake solution to increase the unpowered holding torque of rotary actuators used in mechanisms for telecoms applications (e.g. appendage deployment and positioning).

The main specifications given by ESA are:

  • Minimum 200 stable braking positions

  • Targeted holding torque: 120mNm

  • No tribological layers. No generation of debris

  • Inner diameter: 35mm

  • Length: 15mm

  • Outer diameter: 55mm

  • Mass lower 150g

  • Operating qualification temperature: -45°C – +100°C

  • Mechanical override without damage

  • Fully redundant power lines

  • Minimum power consumption

  • In-orbit life duration of minimum 15 years

  • ITAR free

Challenges

The main challenges are:

  • Common „magnetic brakes“ use tribological layers as brake. Only actuation is done electromagnetically.

  • Eddy current brakes do only provide holding torque while movement (e.g. rotation of axis).

  • Hysteresis brakes provide even holding torque without movement but tend to have stepping even in released mode (ripple)

  • Active) reluctance brakes are not commonly available and rare information on products / prototypes is found.

A completely new technology has to be invented.
 

System Architecture

The magnetic brake consists of stator and rotor, which need to be integrated onto the customers actuator stator and rotor. The axis of the customers actuator has to take up the rotor of the magnetic brake. Additional adjustment tools to align the magnetic brake to the customers actuator are available – especially for synchronization of magnetic brake with a stepper motor.

All parts of the magnetic brake Engineering Model are already produced in close-to-production techniques to proof high quality and still meet the harsh cost criteria of potential end-users. Actuation is done without complex electronics, only an electric pulse is needed to toggle the brake’s state.

Plan

The project is processed in 7 steps:

  1. Review of State-of-the-Art and Application Survey

  2. Finalised Technical Requirements and Selection of Baseline Solution – Milestone: Specification Review

  3. Magnetic brake Breadboard version: design and hardware – Miilestone: Preliminary Design Review

  4. Breadboard performance characterisation

  5. Magnetic brake Engineering Model design and adaptation of baseline actuator – Milestone: Design Review

  6. Engineering Model and full assembly (with actuator) performance characterisation

  7. Overall Evaluation – Milestone: Final Report

Current Status

The project has been completed. Magnetic Brake Breadboard Model and Engineering Model are designed, built and tested. The Engineering Model is fully compliant to the specifications of ESA and the input of potential customers are considered as well – especially the cost requirements for a serial product could be met as well.

Miniature Release Actuator (MiRA)

Mini Hold-Down Release Actuator

STATUS | Completed
STATUS DATE | 06/07/2023
ACTIVITY CODE | 4E.074

Objectives

Develop a competitive Miniature Release Actuator, having a preload capability of more than 1 kN, optimised for the use on small satellites. The item shall be reset-able by the user. In the frame of the ARTES project, several concept designs are being elaborated and brought to BB / EM level. Then, the winning concept was further matured and qualified on company funding, because the resulting product is highly competitive and serves a clear market need.

Miniature Release Actuator objectives

Challenges

There is a strong market pull for a miniaturised release actuator product, addressing the main needs of customers in the small satellite segment: reliability, small size, user reset-ability and reasonable price.

System Architecture

The Mini Release Actuator (MiRA) consists of a secondary actuator, and a cartridge-based initiator.

Plan

The product is developed in a consortium, providing vast expertise in every discipline needed. The consortium is led by Space-Lock, supported by sub-contractors AAC (tribology and material testing), RHP Technology (material development), and FHWN (cube sat builder).

Several generations of the Miniature Release Actuator are designed, analysed, produced and tested. The final hardware generation (BB/EM) is tested to TRL 5-6. Then, the winning design is further matured and qualified on company funding.
 

Current Status

Project completed Q1/23.

Multi-Layered SatCom Systems (MLS)

- Multi-Layered SatCom Systems

STATUS | Completed
STATUS DATE | 14/06/2024
ACTIVITY CODE | 1B.131
Multi-Layered SatCom Systems (MLS)

Objectives

Future SATCOM networks will span multiple orbits, like geostationary equatorial orbit (GEO), medium Earth orbit (MEO), and low Earth orbit (LEO), among others. In addition, they will also cover multiple frequency bands, satellite operators and network designs. These multi-layered, hybrid networks allow for enhanced communications and protect against potential disruptions or attacks. This research studies the future implementation and use cases of such networks. It will focus on examining current technology trends and assessing probable markets that could utilize multi-layered SATCOM applications. The aim is to achieve a system design that is able to support both current and future satellite service types, interoperability, and increased spectral efficiency.

Challenges

Finding a solution that serves remote and hard to reach places, rather than providing more satcom services to already data rich areas. A multi layered solution exploiting existing constellations needs to interoperate with different latency and form factor standards. There is no one terminal that will meet all the requirements of an MLS solution and the cost of developing a new terminal are economically prohibitive. Compromise and collaboration with existing technologies and vendors is the only way.

System Architecture

This MLS system consists of a concurrent GEO + LEO network for high speed, low latency, affordable internet access. Smart routing exploits the latency, data rate, capacity economics, and geographic coverage of the constituent networks and can provide path resilience by using one, or both, of the constituent networks based on user experience or requirements, weather, jamming, cyber-attack, etc and leverages the individual benefits of GEO and LEO to deliver cost effective bandwidth with the perception of LEO-like latency.

The GEO segment will be procured as a commodity from existing capability. The baseline delivery will consist of 3 GEO satellites providing Ka-band capacity with near-global. As markets fluctuate and more GEO capacity is made available through new on-orbit capability.

The LEO segment will consist of a constellation of ~1,000 satellites of 24kg mass, operating in 4 shells of varying inclination at altitudes around 1000km, providing global coverage at LEO with the majority of capacity covering the majority of the global population.  The LEO satellites will operate in E-band with RF V-band ISL capability on ~25% of the fleet to minimise gateway demands and extend coverage to those gateways.

Plan

The project comprised 6 tasks, each deriving technical notes that provide the data.

Task 1: Market and Technology Assessment

Task 2: Scenario Development, Trade Off, and Selection

Task 3: System Requirements and Trade Off Analysis

Task 4: System Definition, Modelling, and Simulation

Task 5: Economic and Regulatory Analysis

Task 6: Gap Analysis and Roadmap

Current Status

All task notes submitted and reviewed with ESA feedback issues resolved. Viasat has designed a conceptual 1000 satellite LEO constellation that utilises GEO as a commodity service to provide a concurrent LEO/GEO MLS system.

Avionics building blocks

- Avionics development on new ARM-based Systems on Chip

STATUS | Completed
STATUS DATE | 15/12/2022
ACTIVITY CODE | 4G.025

Objectives

Architecture of Thales Alenia Space future avionics as well as methods and tools for its development, integration and verification are specified in this project. This includes: 

OBC-core specification with its variability to cope with various missions needs including LEO, MEO, GEO and interplanetary exploration missions.

For Hardware: 

  • OBC-D modules specification. 

  • OBC-D Design Description and Design Report. 

  • OBC-D test and validation plan. 

  • OBC-D tests and test bench specification. 

  • OBC-D Elegant Bread-Board specification. 

For FPGA fabric: 

  • Market and heritage survey. 

  • IPs functions and interfaces specification. 

  • FPGA bit-stream development. 

For Boot and Hardware Dependent Software: 

  • Boot Software specification. 

  • Software drivers for FPGA functions interfacing specification. 

  • Development of test equipment for IPs and IP-drivers integration and test. 

For Application Software: 

  • Selection of ARM multi-core RTOS (Real Time Operating System). 

  • Overall software architecture definition. 

  • RTOS and software prototype integration and test. 

Challenges

One challenge of this study consists in defining the development logic for this new generation computer while following the NG-ULTRA SoC development in parallel to activities for definition and validation of Avionics, Hardware, IPs, Software and ACE. In addition, function allocation among Hardware, FPGA and Software while keeping good dependability level represents one the main challenge of the study. 

System Architecture

 

Plan

Main project milestones are: 

  • Milestone 1 on 2020 March 19th for preliminary specification review. 

  • Milestone 2 to reach PDR level for OBC-D equipment is split in 3 parts. 

    • Part1 held on 2020 May 28th for review of updated specification, reliability assessment and FMEA, test plan and test equipment specification. 

    • Part2 held on 2020 July 23rd, for review of updated documentation and detailed specification. 

    • Completion held in 2020 September. 

  • Milestone 3 is the Test Readiness Review of the hardware/software integration testing on OBC-D CORE functional model

  • Milestone 4 concludes the contract with the Test Review board sharing the results of the HDSW integration and test on OBC-D FUMO.

Current Status

The project is completed.

HPSA

High Power Solar Array

STATUS | Completed
STATUS DATE | 17/02/2022
ACTIVITY CODE | 4F.098

Objectives

The proposed High Power Solar Array (HPSA) program aims to develop a GaAs Solar Array product family with enhanced performances and competitiveness, fitting with new generation of full electric geostationary satellites (Spacebus NEO).

The aim of the development is to establish full non-recurring (NR) engineering and manufacturing file, allowing to start application programs with a minimum NR effort, thanks to a strong will to propose only “off-the shelf” product, with no customization but with options and modularity to adapt the power needs to the payload mission.

The development activities can be sorted in several domains: 

  • Wings Design & Justification File (till CDR level of maturity)
    • Electrical Architecture
    • Mechanical Architecture
  • Network Qualification (Cell, Solar Cell Assembly (SCA), PhotoVoltaic Assembly (PVA))
  • Mechanical Qualifications (Hinges)
  • Solar Array – System interfaces specifications & compatibility verification
  • PFM Tests Sequence synthesis on first application program

Challenges

The key challenges for HPSA project are related to :

  • Network compatibility to the requested environment (standard challenge for new network development, mitigated by the use of sub-contractors experience on elementary parts)
  • Mechanical compatibility with new interfaces and environment.
  • Electrical Orbit Raising environment (Radiation, ATOX, Airdrag …)
  • Generated shock at release, with regard to the platform specification
  • New mechanisms (Root hinge and Lateral hinge) development

System Architecture

The mechanical architecture of the HPSA wing is composed of the following components:

  • The panels substrates with laydown electrical network
  • The yoke (panel concept)
  • The Hinges set for wing deployment
  • The synchronization & sequencer devices for wing deployment
  • The hold down & release structure with low shock release devices

The electrical architecture is tailored according to the spacecraft power need, relying on 15 possible configurations, from 104 to 216 solar cell strings.

Plan

The major milestones of HPSA development program are :

  • Kick off meeting in December 2015
  • Critical Design Review closure in December 2017
  • 1st ProtoFlight Model integration starting in November 2018
  • Qualification Review part1 in November 2018
  • 1st Launch in January 2020
  • Full range qualification review in September 2020

Current Status

COMPLETED.

HPSA Product line is fully operational, already on 7 application programs – in 09/2020) – covering the whole family range.
Qualification is completed.

1st application program (Konnect) has been launched in January 2020.

HV on PCB

High voltage on printed circuit boards

STATUS | Completed
STATUS DATE | 29/10/2021
ACTIVITY CODE | 4F.057
HV on PCB

Objectives

Although High Voltage Technology is a niche marked in space business, it is very important since it enables highly-efficient RF amplification with TWTAs, a significant payload element for a telecom spacecraft, as well highly-efficient generation of thrust per electric propulsion. Further, various scientific instruments rely on high voltage. 
Pending on the equipment use, in space environment (and on the way there), voltages above 200V have to be considered as high voltage (see RD 3). 

Communication TWTAs usually require voltages in the range of 4kV – 7kV, while most electric propulsion thrusters are fed with 300V … 2.000V, pending on the thruster technology.

A comparison of standards for HV on PCB designs either did not exist jet or differ in the distance / material thickness rules (see chapter 4). Further, the parameters and sources, how the rules (if existing) were determined are not available.
Heritage and current designs either avoid high voltage on PCBs or are based on qualified heritage designs, where the true margin for lifetime until electrical breakdown is not known.

All together shows the urgent need for research in this field: Determination of design rules for HV-PCBs for different space-environment compatible coating-, potting-and PCB-substrate-materials, based on lifetime measurements under known parameters enables better prediction of design durability.

Challenges

Main challenges, experienced during the study, were test equipment fails and disturbances due to the electrical breakdowns to the data acquisition system and unexpected long duration to test all the samples.

System Architecture

N/A

Plan

In the beginning, a plan was created to define the sample variants and different PCB layouts. Further, the test strategy has been defined in the Study plan. After release of this plan in the Study Plan Review, the detailed samples and potting mould design was conducted and released with the Manufacturing Readiness Review (MRR). This was followed by the samples production and delivery to the test Facility (HV-Testlab @ ESTEC). Finally, the tests results have been analysed and summarised in the final report.

Current Status

All sample production, testing and results analysis is completed.

EECLOOPS

ELECTRODYNAMICALLY ENHANCED COOLING LOOPS

STATUS | Completed
STATUS DATE | 21/06/2021
ACTIVITY CODE | 4D.057
EECLOOPS

Objectives

     – Target to enhance performance of single-Phase Mechanically Pumped Fluid Loops
     – Reducing pump size or speed/load by optimizing flow at the heat exchanger wall.
     – Increase the TRL from 3 to 4
     – Increase the heat exchanger performance, with a target of a factor of 4 or more per unit area
 

Challenges

An electrohydrodynamically (EHD) enhanced cooling loop heat exchanger breadboard model was designed, manufactured and tested integrated with and externally pumped fluid loop and related Ground Support Equipment Test-Bed. 

The main challenge in this project was the development towards a cost-efficient product, while improving performance of existing cooling loops.  
Technically, this needed to be translated into materials and manufacturing methods that do not compromise the performance or cost in later stages of development of this new type of new heat exchanger, while implementing redundancy and meeting 3 W/K thermal coupling for 35W/cm2.

System Architecture

This heat exchanger will be located in the mechanically pumped fluid loop in close connection to high power hotspots. It consists of fluidic interfaces to the fluidic loop, screwed interface to the load and flying leads. The casing includes the EHD components within internal flow path.

Plan

The development work was divided in 4 major work packages:
     – Requirements & Feasibility
     – Breadboard heat exchanger design
     – Manufacturing, test and verification
     – System performance analysis & trade-off

The milestones were Design Review, Test Readiness Review and Final Review
 

Current Status

The project is finalized and has successfully collected a complete technical specification based on requirements from satellite primes, built and verified a BBM reaching TRL4, with performance mapped in a parameter space covering several applications. Areas for improvement are identified and a plan for reaching TRL 5/6 within 18 months is defined.

TELECOMS

Star Tracker based on Faint Star predevelopment for Telecoms

STATUS | Completed
STATUS DATE | 03/06/2021
ACTIVITY CODE | 4C.035
TELECOMS

Objectives

The objective of the activity was to derive an optimized star tracker design for Telecommunication satellites based on the Faint Star detector. Main development focused on optimizing the use of the Faint Star sensor and the Star Tracker software in order to host the Star Tracker Software in the avionics on-board computer.

Challenges

The main challenges of the project were the following:

  • Development of a low-impact star tracker software architecture (including associated implementation guidelines), that eases integration of the star tracker run-time library (STRLib) in on-board computers, thus providing an attractive option for the telecom primes.
  • Meetings with the major European telecom primes revealed the need for a redundant star tracker interface, covering both power and communication. The actual implementation of the redundant interface into the current compact Faint Star camera head unit design turned out to be challenging.

System Architecture

The overall system architecture consists of the following entities:

  • Customer furnished on-board computer (OBC) (part of the spacecraft bus) with modest amount of spare resources, a SpaceWire interface, and software SpaceWire interface drivers
  • Terma star tracker optical head
  • Terma star tracker library (STRLib)
  • Small supervisor application (developed by customer or Terma) equivalent to the Terma STRLib example supervisor

This architecture eliminates the need for a dedicated computer for processing of the image stream from the optical head, thus reducing total mass and power consumption.

As a proof-of-concept, the STRLib was integrated standalone on a customer-furnished spacecraft computer for interfacing to the optical head. The customer subsequently integrated STRLib in a space and time partitioned safety-critical real-time operating system, thereby demonstrating the ease with which the combination of flight-proven STRLib and high accuracy optical head may be integrated with the avionics platform.

Plan

The project has been executed according to the following schedule:

  • Kick-Off: September 2017
  • Baseline Design Review: May 2018
  • Mid-Term Review/Test Readiness Review: December 2019
  • Test Review Board/Final Review: March 2021

Current Status

Completed