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StatusCompleted
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Status date2015-05-28
The AISTB project aims at developing an End-to-End Testbed able to evaluate the different AIS systems performances both at system and subsystem level, in a laboratory environment.
Two main subsystems were developed: the AIS Receiver Testbench, capable of interfacing with different AIS receivers (prototype, engineering model, EQM) from different manufacturers to assess their functionality and performance; and the System Emulator, a software capable of modeling any AIS constellation with configurable key system parameters including vessels traffic distribution, constellation, access protocol as well as AIS antenna and receiver characteristics.
The AIS Receiver Test Bench also includes a prototyping hardware platform to be used to implement the AIS receiver algorithms specified by ESA for benchmarking purposes.
As a secondary objective, advanced beamforming techniques to enhance the satellite AIS detection performance were studied and evaluated in detail, possibly leading to a reduced constellation and thus a lower total space segment cost.
The aim of this activity is to develop an end-to-end system validation platform for space based AIS systems and sub-systems.
The AIS Testbed is meant to facilitate the evaluation of different AIS performance measures at system and subsystem level in a laboratory environment.
The AIS Testbed will be used in the comparative performance assessment activity for evaluating the performances of existing or planned systems and of the underlying technologies.
The target lifetime of the AIS Testbed is at least 5 years.
The AIS Testbed will be key element in the Comparative Performance Assessment, to independently evaluate both AIS system concepts and AIS subsystem performances (receiver, antenna, space segment, ground segment).
Furthermore, AIS receiver manufacturers can use the AIS Receiver Testbench to characterize the performances of their HW units (prototype, EM, EQM), or even to qualify the Flight Models to be later embarked on SAT-AIS satellites.
Finally, the Digital Beamforming parallel activity gives insights and numerical evidence of the possibility to use DBF algorithms to enhance the satellite AIS detection performance, possibly leading to a reduced constellation and thus a lower total space segment cost.
The AIS End-to-End Testbed is a validation tool able to evaluate the different AIS systems performances both at system and subsystem level.
The AIS End-to-End Testbed is composed by two main subsystems:
- the AIS Receiver Testbench, grouping all the hardware components for control, VHF generation and AIS receiver HW-in-the-loop testing. It also includes the fast prototyping receiver platform, hosting the AIS advanced receiver algorithms as provided by ESA, and the Test Management System for controlling test cases selection and execution.
- the System Emulator, in charge of:
- computation of the simulation/emulation scenario;
- computation of the AIS vessels signals;
- computation of the Satellite model;
- computation of the DBF antenna models
- processing and storing of the BB antennas’ signals;
- Test case configuration;
- AIS Receiver performance evaluation
The following figures show the AIS Testbed block diagram and a picture of the overall testbed.
The System Emulator SW, driven by the Test Management System SW, creates the AIS Receiver test scenarios. In particular, the System Emulator handles Ships distribution, Ship models, Satellite model, Antenna array model, Single antenna of the array model. Specific input interfaces are designed to handle these information.
The System Emulator creates, and stores in .wav files, the IQ Baseband stream of samples for each antenna signal to be emulated/simulated, and for each satellite in the system constellation.
Different test modes are available in the AIS Testbed: pure SW test, HW-in-the-loop test with RF input, HW-in-the-loop test with baseband input.
In case of SW performance tests, the baseband files are directly processed by the selected AIS Receiver SW Model to produce decoded messages and metadata, input to the Performance Evaluation SW module. The Testbed provides an embedded Receiver SW Model. IQ baseband files can be processed off-line by 3rd party SW Models, provided the input/output Testbed interfaces are fulfilled (to allow subsystem performance characterization).
In case of HW-in-the-loop tests, instead, the same baseband stream (with the correct frequency plan) is sent to the TX Emulator for real-time RF signal generation, or to the Fast Prototyping Receiver platform for direct injection into a Baseband Receiver implementation.
For Real-time RF signal generation, the IQ baseband data have to be up-sampled by the TX Emulator from around 100kHz to around 10MHz, to be then streamed to the digital-to-analog conversion chain.
For baseband receiver testing, IQ samples are directly ingested by the Fast Prototyping Receiver platform. This platform hosts an embedded AIS receiver based on AIS Advanced Algorithms delivered by ESA. However, FPGA implementations of AIS baseband receivers from 3rd parties can be also hosted, provided that the correct interface with the prototyping platform is implemented by 3rd parties.
In case of HW-in-the-loop tests, the decoded messages and metadata are delivered to the performance evaluation SW module through a dedicated physical link. Ethernet (used by the Fast Prototyping Receiver platform), RS422 and the predisposition to the SpaceWire are supported by the AIS Testbed. Should another physical interface be available on the UUT, a dedicated adapter shall be provided by the UUT manufacturer.
The System Emulator and the Test Management System run on the Control PC. The same PC hosts an Interface Module with the physical layer interfaces to the UUT (Ethernet, RS422, predisposition to the SpaceWire) and a dedicated SW for management and parsing of receiver data from UUT to the Performance Evaluation Module.
Ethernet connection is also provided as external interface, to allow remote control of the Testbed.
The duration of the overall project is 11 months. A 6-months Remote Support period is foreseen after Testbed delivery to ESTEC Telecom Laboratory.
The activity is structured in the following tasks:
- Task 1: Testbed Definition
- Task 2: AIS Receiver Test Bench Detailed Design and Implementation
- Task 3: System Emulator Development
- Task 4: Beam Forming Techniques Investigation for Space Based AIS
- Task 5: Testbed Integration
- Task 6: End-to-end Validation Campaign
- Task 7: Reporting and Testbed Delivery
The project completion, with AIS Testbed delivered, installed and tested at ESTEC Telecom Laboratory, is scheduled for Q1 2013.
The project completed all the activities at the end of September 2014.
The development and testing of the AIS ESA software and ESA receiver model and of the hardware model has been finalized.
The AIS testbench integration and validation is done.
Functional and performance tests of the System Emulator has been performed.
