• Status
  • Status date

The objective of the activity was to design, develop and test an air interface enabling the reduction of the RF transmit power of remote Internet of Things (IoT) terminals connected directly to satellites. The targeted improvement was to reduce by an order of magnitude the RF transmit power density at the remote terminal.


The main challenges in this activity were to design and implement an IoT satellite gateway receiver that:

  • can detect and demodulate IoT bursts at extremely low signal-to-noise ratios (Ec/No < -40 dB)

  • can detect and demodulate IoT bursts that are transmitted without any timing coordination

  • can detect and demodulate multiple IoT bursts in parallel, where the IoT bursts are (partially) overlapping in time and frequency. 


The frequency agnostic air interface that was developed in this activity supports uncoordinated IoT communication over satellite links at lower signal-to-noise ratios than any other known system. For the two use cases demonstrated in this activity it was demonstrated successful communication down to signal-to-noise-ratios of Ec/No = -28 dB and Ec/No = -43 dB, respectively. 

  • Frequency agnostic scalable air interface which can support a wide range of use cases

  • Low-complexity and near-capacity approaching error-correcting codes tailored for this air interface

  • Support for uncoordinated transmissions from the IoT terminals

  • Gateway receiver capable of receiving IoT bursts from multiple terminals in parallel, where the received bursts may overlap in time and frequency. 

  • Gateway receiver design supporting Successive Interference Cancellation (SIC)

  • Novel, scalable, high-performance receiver design running on a powerful software defined radio (SDR) platform able to support very large number of users

  • Use of AES-MAC for improved message authentication integrated with error detection. 

  • Support for IoT communication over satellite links with extremely low link margins (down to Ec/No below -40 dB)

System Architecture

The architecture of the demonstrator developed in this project is shown in the block diagram below.


  • The project was kicked off in January 2020.

  • The System Requirement Review (SRR) was held in July 2020.

  • The Preliminary Design Review (PDR) was held in March 2021. 

  • The Critical Design Review (CDR) was held in June 2021. 

  • The Test Readiness Review (TRR) was held in June 2022.

  • The project was completed, and the Final Review was held in January 2023.

Current status

The project is completed.

Prime Contractor