PAGE CONTENTS
Objectives
Nowadays, the modem part of the user terminals for Satcom market is implemented on dedicated hardware components, which brings a number of constraints, such as customised production and long development cycle time, among others. There are certain Satcom market areas (e.g. automotive, IoT, multicast, VSAT) where user terminals could benefit from the use of a software modem implementation running in already existing general purpose computing hardware, thus with lower development cycle and costs.
In the activity, a fully software-defined wideband DVB-S2X demodulator prototype that runs on the CPU of consumer hardware platforms has been implemented. The focus has been on low-complexity and power-efficient algorithms optimized for the vector instruction sets of different CPU platforms. Intel and ARM-based CPUs like Apple’s M1 as well as Windows, MacOS and Linux are supported.
The software demodulator prototype supports the full range of normative DVB-S2 and DVB-S2x MODCODs, including time slicing capabilities (defined in EN 302 307-1 Annex M). The architecture of the software is modular and flexible and enables simple and effective customization to a wide range of different platforms and application scenarios.
Challenges
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Comprehensive support of a wide range of MODCOD profiles and options fully compliant to the DVB-S2x standard.
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SW Implementation minimizing computational resources while maintaining any combination of application specific data-rate and latency requirements.
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Scalable, modular and flexible SW design that allows execution on various consumer target platforms, simple upgrades and user-defined extensions.
System Architecture
Software defined and modular DVB-S2x demodulator consisting of the following components:
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Matched filter
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Carrier & frame acquisition
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Timing, frequency and phase synchronization
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LDPC decoder
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BCH decoder
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GSE decapsulator
Interfaces:
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Sample input: DIFI.
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Packet output: Ethernet/IP
Plan
Milestones:
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MS1 Requirements Review (RR)
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MS2 Technical Baseline Review (TBR)
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MS3 Critical Design Review (CDR)
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MS4 Test Readiness Review (TRR)
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MS5 Acceptance Review (AR)
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MS6 Final Review (FR)
Current Status
Activity finished.
