PAGE CONTENTS
Objectives
The project is to develop an AIS system with an added function to remotely update the firmware to the FPGA.
The objective is to use an existing AIS system and re-design to add this function to update firmware onto the FPGA via microcontroller, i.e. in- flight reprogramming.
The project takes an evolutive approach that will allow a stepped development to more advanced in keeping the AIS system updated while in use with future requirements on the functions.
The result is a more flexible, software configurable product designed to give mission assurance with optimised cost of ownership for the evolving small sat world.
Picture credit: COM DEV Europe (TA Honeywell). FLARe AIS Unit
Challenges
The key challenges are in appropriate component selection for the given design philosophy and the system architecture choices to meet the exacting radiation, thermal, mechanical and electrical environmental factors, while maximising product functionality and configurability. Key experiences from heritage flight datalink products, where pragmatic qualification approaches were validated are essential to development success. Our development also requires inputs from as many potential users as possible to ensure that its capabilities meet customer needs.
System Architecture
Plan
MS1 PDR: Architecture development, Concept development & breadboard design
MS2 CDR: detailed design and MAIT of EM unit
MS3 TRR: EQM MAIT, test system development and release MS4 FR: Qualification of EQM and development
Current Status
Project KO meeting held January 2016, early preliminary design presented with work ongoing towards PDR
