Status date
Activity Code

The purpose of the wideband modem is to exploit the very wide (59-71 GHz) frequency allocation in Ka/V-band with as few as possible channels, in order to optimize the satellite platform resources.

The modem is breadboarded (TRL 4) with very wideband transmit and receive capabilities and respectively high symbol rates.

By implementing a variety of coding and modulation options, the modem is capable of supporting various ISL ranges, from short- to medium-range that can enable communication between small/medium platforms.


The main challenges that are addressed in this activity are mainly how to perform onboard encoding/decoding, analog/digital conversion as well as modulation/demodulation over wideband (GHz) channels in a lightweight manner.

The modem enables RF ISL links with: 

  • limited FPGA resources, 

  • imperfect and bandlimited analog components, 

  • doppler scenarios typical to large LEO constellations


The demonstrated wideband RF ISL provides a viable alternative to the more complex optical inter-satellite link technology.

The FPGA based implementation is easily extended or customised to the needs of a specific mission.

  • A wideband ISL modulator receiving digital user data from the user data interface and delivering encoded and modulated data symbols at an appropriate intermediate frequency (IF). 

  • A wideband ISL de-modulator receiving modulated data symbols at an appropriate intermediate frequency (IF), tracking the signal in extreme doppler scenarios, decoding the symbols, and delivering the digital user data to the user data interface.

System Architecture

The Gigabaud wideband ISL system features: 

  • Low power, high data rate encoder and decoder 

  • Wideband (GHz range) modulator and demodulator 

  • High rate converters between analog and digital domains. 

  • CCSDS 131.2-B-2 coding and modulation 

  • Flexible FPGA solutions suitable for on-board applications 

  • Doppler (shift and rate) resilient signal tracking, and pre-/post-compensation

GIGABAUD System Architecture


The activity is organized in four tasks: 

  • Task 1: Overview of state of the art ISL links and their use of RF and optical technologies, followed by derivation of a set of finalized technical specifications and a preliminary design; 

  • Task 2: A detailed design justified by mathematical and simulated performance, and implementation of the breadboard; 

  • Task 3: Validation of function and performance, of the breadboard; 

  • Task 4: A technology assessment and development plan 

The following milestones applied: SRR, BR, PDR, DDR, TRR, and FR.

Current status

The breadboard is validated functionally and RF ISLs with datarates beyond Gbps are achieved. The testcampaign for performance validation is ongoing.

Prime Contractor