Integrated D-band MMIC chipset for 5G/6G phased array applications Integrated D-band MMIC chipset for 5G/6G phased array applications

  • Status
    Ongoing
  • Status date
    2024-10-22
  • Activity Code
    3F.028
Objectives

The objective of this feasibility study is to assess the viability of an intermediate frequency input to D-Band antenna output system within a compact footprint. By engaging with system integrators and gathering detailed specifications and performance requirements, VIPER RF aims to develop a preliminary design and technology study for a phased array chipset. Various architectural options will be explored, including system-on-chip or system-in-package solutions, with a particular focus on silicon germanium based semiconductor technology due to its inherent integration capabilities of control and RF electronics.

Challenges

The challenge of developing a D-band chipset is to optimise the interfacing of the semiconductor chips with the sub-system to enable useful system performance.  Considerations include signal attenuation in atmospheric conditions, precise beamforming due to beam squint effects, low semiconductor transition to operating frequency ratio, imbalance mismatch, reconfigurability and antenna issues, higher SNR and linearity requirements for higher order modulation schemes, and packaging difficulties. 

Benefits

This feasibility study is aimed at understanding the challenges and necessary breakthroughs in technology, packaging, system, and regulatory limitations. This study assists in steering the development of solutions for D-band chipsets including semiconductor technology selection, antenna integration, packaging approaches, and the necessity of reconfigurability. Additionally, understanding the future roadmap of 6G adds some clarity to the options and levels of reconfigurability required.

Features

This feasibility study of D-band chipsets for 5G/6G space applications assesses state-of-the-art semiconductor technologies such as GaAs pHEMT, mHEMT, mm-wave GaN, and SiGe HBT processes. For antenna integration, approaches like antenna in package (AiP) and antenna on chip (AoC) are evaluated using advanced semiconductor and multi-layer board technologies. In terms of packaging, the study explores novel solutions such as flip chip with copper pillars, TSV in silicon, and hot-via holes in GaAs technologies. An assessment of ground continuity in various packaging approaches is provided. The study also offers recommendations on reconfigurability and circuit approaches, which are crucial for developing a modern 6G-compatible chipset. A roadmap addresses both opportunities and challenges at D-band.

System Architecture

The system architecture and its building blocks are addressed, along with the necessity of reconfigurability and its various approaches. It was noted that reconfigurability should extend beyond RF hardware to include the baseband processor and modulation schemes, due to the high attenuation in the D-band caused by atmospheric conditions. The system architecture will vary depending on the wide range of applications and potentials in the D-band, which are detailed in the reconfigurability and roadmap chapters.

Plan

This feasibility study has been undertaken in nine calendar months with Kick Off, Mid-Term and Final reviews. 

Current status

This completed feasibility study explores the potential and limitations of semiconductor technologies, packaging, antenna integration, circuit, and reconfigurability approaches. The study concludes by outlining challenges, potentials, collaboration opportunities, and possible D-band applications in space for 5G/6G. 

Prime Contractor