PAGE CONTENTS
Objectives
This project covered technology assessment and development of lead free assembly technologies for the space environment. This includes solder selection, material properties, conditions for higher temperature reflow, fatigue characteristics, failure modes and adaptation of assembly techniques used for space hardware.
Outputs of these activities are made available for the future evolution of the ECSS-Q-ST-70-61C standard or for dedicated standard for lead free assembly technologies.
The objective of the activities are to develop techniques and technologies enabling reliable lead-free assemblies of RF and digital circuit boards as needed in satcom payloads. An Engineering Model representing sub-system elements for future constellations and geostationary commercial applications were manufactured and tested.
Targeted Improvements were enabling the use of lead-free commercial EEE components for space application not established today.
Challenges
Regulatory pressures, such as RoHS and REACH, necessitate the adoption of lead-free materials, yet these materials often present reliability issues, including higher reflow temperatures that can compromise PCB integrity and increased risks of tin whisker formation. The selection process for the key candidates during the literature review was therefore crucial. The lack of established inspection methods for lead-free solder joints further complicates the process.
Additionally, achieving the required Technology Readiness Level (TRL) was key, but further testing and optimization are necessary to reach higher TRL Levels.
Plan
The project milestones were structured as following:
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MS 01: Technical baseline Selection Review
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Phase 1: Finalised Technical Specification
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Phase 2: Selected Technical Baseline
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MS 02: Technology Review
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Phase 3: Verified Detailed Design
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MS 03: EM TRR
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Phase 4: Implementation and Verification Plan
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MS 04: Final Review
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Phase 5: Verified Deliverable Items and Compliance Statement
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Phase 6: Technology Assessment and Development Plan • MS 05: Final Presentation
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- Plan • MS 05: Final Presentation
Current Status
The project has been completed successfully by providing the necessary proof that the selected solder candidate has reached the targeted TRL 5/6.
