O3KHPE-RX IP Core Development for CCSDS-Based Optical Payload Data Receiver

The primary goal of this project is the creation of Intellectual Property (IP) Cores that handle the coding and synchronization layers for the receiving end of both High Photon Efficiency (HPE) and Optical On-Off Keying (O3K) standards. These IP Cores feature high modularity, ensuring their implementation across various technological platforms. Their role is to perform synchronization and demodulation on the incoming optical signal, perform the necessary decoding operations, and pass the resulting data to higher-level stages.

Specifically, the HPE Receiver IP supports the synchronization on the transmitted pulse-position modulation slots, and successive decoding of data according the Serially Concatenated Convolutional Code (SCCC) used in the standard. The IP Core aims to support all the configurations defined in the standard, up to the highest link rate transmission of 0.125 ns per slot.

For the O3K Receiver IP, it supports both Low-Density Parity-Check (LDPC) and Reed-Solomon (RS) coding schemes up to the maximum link rate of 10 Gsym/s. Notably, when LDPC coding is employed, the receiver can also auto-determine the transmission parameters by examining the frame structure and the signalling data contained within it. This feature allows for real-time link adaptation without any interruption or loss of data.