PBC Cooling

PCB ARCHITECTURE USING MICRO-LOOP HEAT PIPES

STATUS | Completed
STATUS DATE | 13/05/2015
ACTIVITY CODE | 4D.020

Objectives

The design of PCB (Printed Circuit Board) is constrained by the thermal management of the most dissipative components. Indeed, as only conductive heat transport is available, it is required that the most dissipative components be placed close to the PCB thermal interface. Moreover, conductive links, as thermal straps, are used in order to insure the specified temperature on high dissipative component (close to 10 W).

Less dissipative components are pushed away to hotter zones of the PCB leading to degraded reliability figures and a lay-out not optimized in terms of performance.

The recent progress made in the technology of Loop Heat Pipes (LHP), where stable heat transport can be achieved with input powers of 10Watts or less, make it a potentially interesting technique to relieve the design of PCB for the constraints above.

The application reference case is a cooling of electronic devices in Small Modular Processor application. The objectives of this activity were to identify the most suitable LHP technology, to define and justify the solutions retained, to manufacture, integrate and test the models and to compare to the initial reference design.

Challenges

The major design driver requirements are described hereafter:

  • Qualification evaporator temperature range : [-50°C +95°C]
  • Power range : main dissipative elements: [5-15]W, second dissipative components: [3-5]W
  • Envelope / IRD / accommodation : evaporator height and line routing (bends)
  • Mechanical Environmental loads (shock)
  • Ability to start up at temperature of -40°C / no overshoot
  • Thermal performance : Ctot 1W/K (x3 better than copper strap)
  • Condenser heat sink max temperature 62°C
  • Mass (80g)
  • Integration sequence / handling / mounting/ dismounting

Interfaces (flatness/stiffness)

Plan

The project has been divided into 2 phases:

–       A 18 months phase 1 aiming at designing the concept and performing tests on a breadboard

A 12 months phase 2 aiming at adapting the concept on a real case PCB resulting on a EM which been tested.

Current Status

The activity is COMPLETED.

Phase 1 tests have been successfully performed: the test has been done with PCB/SMP and interfaces representative plate. All test objectives have been met in terms of start-up, inhibition, LHP performance characterization, multistage functioning in vacuum.

Phase 2 tests have been successfully performed: SMP has been retrofitted with the mini-LHP in multistage configuration. Configurations with copper strap and with LHP have been tested.