Description
Priority 2: Priority 2 activities will only be initiated on the explicit request of at least one delegation.
The objective of the activity is to design, develop and test V-band 3-channels input demultiplexer. One EM shall be built and tested.
Targeted Improvements: To develop key technology for the input demultiplexers in V-band.
Next generation of High Throughput Satellite aims to use Q/V band (40/50 GHz) for the feeder link and hence increase the available Ka-band spectrum for the user links.
The number of gateways required to support the user’s demands must be reduced as much as possible by using most of the available V-band bandwidth (47.2-50.2 GHz & 50.4-51.4 GHz). Due to the reduced user link bandwidth and the frequency re-use scheme, the signal received from the gateway must be divided before the down conversion to Ka-band. Slightly different down-conversion is then applied for each sub-bandwidth from V-band to Ka-band downlink.
Previous works have been dedicated to the development of V-band devices such as feeds, input filters and diplexers. Input demultiplexers require the development of channels with a narrow bandwidth which can vary between 0.5% and 3% the central frequency.
High frequencies, such as V-band, are intrinsically related to high manufacturing accuracy which can limit considerably the technologies and process which can be applied.
This activity aims to design a 3 channel input demultiplexer at V-band . Different architectures for the demultiplexers shall be compared as well as the resonators geometry, topology, coupling mechanisms, etc. Special attention shall be paid to the feasibility of the different approaches with respect to the manufacturing limitations.
This activity will cover the design, develop and testing of the following components:
- One 250 MHz V-band channel at high frequency band-edge.
- One 500 MHz V-band channel at high frequency band-edge.
- One 1 GHz V-band channel at low frequency band-edge.
Previous to the development of the EM input demultiplexer, at least two BB channels shall be developed and tested over operating temperature range as proof of concept.
The work logic shall be:
- Study of synthesis, resonators types, topologies and manufacturing methods.
- Validation of the design concept and manufacturing methods.
- Design, manufacturing and testing of two channel breadboards.
- Design, manufacturing and testing of one EM V-band demultiplexer.